- Robot type
- Drone · Defense
- Location
- BroomfieldColoradoUSA
- Job type
- Hardware
- Posted
- Aug 31, 2026
- Salary
- $143,000–$191,000 a year
Full-time
FPGA Engineer
Job description
The Battlespace Awareness (BA) team develops state-of-the-art radar systems, deployed to tackle the most significant security challenges of America and its allies. Working across hardware, software, and firmware; in both the RF and digital domains; the team delivers radar architectures that enable advanced surveillance, reconnaissance, and targeting in the contemporary and future battlespace. The Radar team is responsible for all aspects of radar system development; from concepts and architectures through to fielding and sustainment.
We are looking for a Senior FPGA Engineer to join our rapidly growing team in Fort Collins, CO.
Anduril Industries is a defense technology company with a…
Job responsibilities
- Lead FPGA architecture, design, and verification efforts for airborne radar systems from concept through production
- Translate signal processing algorithms into efficient, high-performance FPGA implementations on Altera SOC/FPGA platforms
- Establish and drive robust FPGA design processes, coding standards, and verification methodologies for the airborne products team
- Collaborate with the Battlespace Awareness engineering team to ensure design consistency and knowledge transfer across sites
- Design and implement digital signal processing chains for radar systems, including data acquisition, filtering, and real-time processing
- Perform timing analysis, resource optimization, and debugging of complex FPGA designs
- Develop and maintain design documentation, including architecture specifications, design reviews, and verification plans
- Mentor and guide other engineers as the team scales FPGA capabilities
Job requirements
- Bachelors degree in electrical engineering, electronics engineering, computer engineering or related field.
- 12+ years of professional experience in FPGA design and development
- Strong expertise in RTL design using SystemVerilog and/or VHDL
- Demonstrated experience with Altera FPGA devices and development tools (Vivado, Quartus, etc.)
- Proven experience in digital signal processing implementation on FPGAs
- Self-directed technical leadership with ability to independently drive projects from requirements to implementation
- Experience with FPGA verification methodologies and simulation tools
- Strong understanding of timing closure, resource optimization, and FPGA design constraints