Machine Learning Engineer, Compiler

Job description

Job responsibilities

• Own the ML compilation pipeline end-to-end — from checkpoint to deployable bundle on NVIDIA (TensorRT) and Qualcomm (QNN) targets.
• Design and implement compiler passes with accuracy and latency gates, so bad compiles are caught before they reach hardware.
• Build compilation infrastructure that scales across platforms, model architectures, and SoCs — without re-engineering for each new target.
• Partner with model and training teams on compilability; build regression and benchmarking to validate changes across releases.
• Set technical direction and raise the bar for compiler engineering across the team.
• Own the ML compilation pipeline end-to-end on NVIDIA (TensorRT) and Qualcomm (QNN) targets.
• Design and implement compiler passes with accuracy and latency gates.
• Extend precision typing and graph-splitting logic for new architectures and SoCs.

Job requirements

• You have built or significantly extended ML compilation or graph-lowering pipelines.
• You understand multi-stage lowering (capture, decomposition, precision assignment, legalisation) and can debug what breaks at each stage.
• Strong proficiency with at least one relevant stack (e.g. MLIR, ONNX, TensorRT, Qualcomm QNN, PyTorch export/capture) and confidence learning adjacent frameworks quickly.
• Experience with quantisation in compilation — precision typing, PTQ integration, and tracking down accuracy loss from compiler transforms.
• Comfortable from high-level model graphs down to vendor backend constraints; strong Python, with C++ a plus.
• Clear communicator who can align cross-functional teams on compilation trade-offs.
• Real compiler ownership — full lowering pipeline from checkpoint to deployable bundle, working deeply with TensorRT and QNN.
• Hard problems — quantisation preservation through decomposition, cross-SoC precision typing, graph partitioning under speed/accuracy trade-offs, legalisation that does not silently break earlier passes.