- Robot type
- Sensors and Components
- Location
- New YorkNew YorkUSA
- Job type
- Hardware
- Posted
- Oct 27, 2026
- Salary
- $200,000–$280,000 a year
Principal PIC (Photonic Integrated Circuit) Design Engineer
Job description
Voyant Photonics builds silicon photonic chips that steer and switch light at high speed. They power next generation, chip-scale FMCW LiDAR for robotics and autonomy, and optical circuit switches (OCS) for AI data centers. Based in NYC, we’re a hands-on team designing, building, and deploying frontier hardware to solve problems that matter, from how machines see to how AI scales.
Job responsibilities
- Lead system-level architecture and design of large-scale silicon photonic integrated circuits (PICs), integrating hundreds to thousands of active and passive photonic devices.
- Define chip-level optical architectures, link budgets, and performance trade-offs across insertion loss, crosstalk, bandwidth, power consumption, and thermal management.
- Drive top-level chip integration, floorplanning, optical routing, and design-for-manufacturability (DFM) strategies for high-yield silicon photonics tapeouts.
- Contribute to photonic component library development
- Serve as top-level tapeout owner, managing design verification (DRC/LVS) and foundry tapeout execution
- Provide technical leadership across multidisciplinary teams, collaborating closely with component designers, packaging engineers, electronic IC (EIC) designers, and system software engineers.
- Guide wafer- and chip-level characterization strategies to evaluate full PIC performance against system-level requirements and drive iterative design updates.
- Establish and maintain technical relationships with foundry partners to evaluate next-generation process design kits (PDKs) and platform capabilities.
Job requirements
- Ph.D. in Electrical Engineering, Applied Physics, Photonics, or a related field with 5+ years of relevant industry experience.
- 7+ years of hands-on experience in silicon photonic integrated circuit (PIC) design, including electromagnetic simulation, active and passive component optimization, and top-level chip layout/floorplanning.
- Proven track record of taking complex silicon photonics designs through full foundry tapeouts (DRC/LVS) and successful silicon validation/characterization.
- Deep expertise in photonic device physics, optical waveguide theory, silicon and silicon nitride fabrication processes, and design-for-manufacturability (DFM) principles.
- Proficiency with industry-standard simulation and layout tools (e.g., Ansys Lumerical, Tidy3D, COMSOL, KLayout, and gdsfactory).
- Experience with optical characterization techniques, data analysis in Python or MATLAB, and translating lab measurements into PDK and circuit design updates.
- Strong technical leadership capability, excellent communication skills, and a demonstrated ability to collaborate across multidisciplinary teams (packaging, EIC, systems, and test).
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