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Anduril

Robot type
Drone · Defense
Location
Costa MesaCaliforniaUSA
Job type
Hardware
Posted
Sep 2, 2026
Salary
$166,000–$220,000 a year
Full-time

Senior Digital Design Engineer, Air Dominance and Strike

Job description

The Air Dominance and Strike (AD&S) Electrical Engineering Team develops high-reliability avionics, embedded processing, and power systems for Group 5 air vehicles and missile platforms. Working across hardware, software, and mission autonomy, the team delivers flight-critical electronics, PCB assemblies, and FPGA-based processing architectures for Anduril's next-generation autonomous air platforms. AD&S Electrical Engineers drive end-to-end development, from system architecture and circuit design through verification, integration, and flight test, delivering mission-ready systems that meet demanding performance, reliability, and survivability requirements.

Job responsibilities

  • Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems.
  • Translate system and hardware requirements into microarchitecture, interface definitions, and implementation plans.
  • Own FPGA designs or major functional blocks from architecture through integration, timing closure, and lab debug.
  • Develop and execute simulation, synthesis, and implementation flows, including timing and resource closure.
  • Debug functional, timing, and integration issues in simulation and on hardware.
  • Support board bring-up, lab validation, and system integration on target platforms.
  • Collaborate with hardware, embedded software, systems, and verification engineers to deliver complete solutions.
  • Participate in design reviews, code reviews, and technical documentation.

Job requirements

  • 12+ years of FPGA development experience.
  • Experience owning a major functional block, subsystem, or full FPGA design from concept through integration.
  • Familiarity with AMD (Xilinx), Intel/Altera, or Lattice FPGA development environments.
  • Experience with embedded systems and hardware/software co-design, including AMD (Xilinx) Vitis or similar tooling.
  • Familiarity with common high-speed or embedded interfaces such as Ethernet, PCIe, JESD204, SPI, I2C, UART, CAN, or MIL-STD-1553.
  • Familiarity with DO-254 or similar military or safety-critical development standards.
  • Experience building or improving reusable IP, verification infrastructure, CI/CD flows, or team workflows.
  • Familiarity with modern build and development tooling such as Jira, automated regression infrastructure, and reproducible build environments.

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