We are building Terafab, a vertically integrated semiconductor factory at an unprecedented scale. The facility houses logic, memory, packaging, test, and lithography mask production under one roof, optimized for rapid iteration and maximum compute density per square foot.
Process engineering is where the discipline by which Terafab technology gets built, atom by atom, and dielectric films set the foundation for device performance. You will develop and own dielectric deposition processes across three distinct chip families: edge-inference processors, space-hardened data center AI chips for orbital satellites, and high-bandwidth memory. You’ll optimize mechanical, chemical, optical, and electrical properties of dielectric thin films including but not limited to film stress, conformality, gapfill, dielectric constant, and leakage current while balancing thermal budgets and integration constraints across radically different product requirements.
You should have deep expertise in dielectric deposition but be ready to work across core process domains such as etch, clean, CMP, metallization, photo, metrology, and thermal processing and integration engineers as integration evolves. This is a highly hands-on role at one of the most ambitious fab programs in the world.
